Technical Evidence Registry
QuietEdge Technical Evidence Registry
QuietEdge separates measured results, reference-model results, hardware validation, and future engineering targets. This registry records what has been demonstrated, how it was demonstrated, and what remains to be proven.
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Evidence classification
How QuietEdge classifies evidence
Results measured in target-class processing or hardware environments.
Physical power-system validation currently underway or completed as specifically identified.
Results generated in reference models or simulation environments.
Intended future performance that has not yet been fully demonstrated.
These definitions are used consistently across the QuietEdge site and all public technical materials.
Measured today
Embedded control execution — TI AM2634
Loop budget
10 µs
100 kHz target
Average execution
4.07 µs
AM2634 measured
Maximum execution
4.69 µs
AM2634 measured
Average headroom
~59%
against 10 µs budget
Horizontal bar: 0–10 µs loop budget. Markers at 4.07 µs (average) and 4.69 µs (maximum).
This is embedded control-code execution timing on TI AM2634. It is not yet a complete electrical transient-response measurement of the converter, rack bus, or full power system.
Test context
Control-code execution timing measured on Texas Instruments AM2634 microcontroller. Loop budget: 10 µs (100 kHz). 100 samples measured.
What this measurement is not
- Rack bus transient response
- Power-stage settling time
- End-to-end transient recovery time
- Converter output voltage response
Hardware validation underway
Staged 800 V-class SiC DAB hardware validation
Staged 800 V-class SiC dual-active-bridge hardware validation is underway.
Validation proof ladder
The primary regulator remains authoritative. Hardware protection remains independent and cannot be bypassed by the QuietEdge observer.
Not yet claimed
- Completed bench transient response
- Bench-measured ripple performance
- Hot-swap or fault-rejoin validation
- Multi-module shared-bus performance
Reference-model technical effects
Adaptive layer — paired reference-model A/B results
The adaptive layer was the controlled variable in paired reference-model A/B runs. These values are feasibility and technical-effect evidence, not completed power-hardware validation.
Duration
6,000 ms per run
Time step
1 ms
Configuration
Same modules, same control gains
Comparison
Adaptive OFF versus adaptive ON
| Metric | Adaptive OFF | Adaptive ON |
|---|---|---|
| Recovery after peak | ~216 ms | ~72 ms |
| Peak ripple | 47.91 mV | 41.42 mV |
| Peak-to-RMS ripple ratio | 2.16 | 1.69 |
| Dither RMS | 0.8° | 0.245° |
| Dither-energy proxy | 3,848 deg²·ms | 596 deg²·ms |
| Unserved-energy proxy | ~0.11% | ~0.10% |
| Average observation step interval | 1 ms | ~35 ms |
| Average log interval | 10 ms | ~70 ms |
| Transition-mode occupancy | — | ~1.4% |
Required caveats — must be read alongside these values
- Not bench-validated DAB or SST performance.
- Do not infer certified ripple, EMI, efficiency, field uptime, or server-life improvement from these model values.
- Results depend on workload, thresholds, hardware, and configuration.
Optional technical detail
Next physical proof
Engineering targets — not yet demonstrated
The following validation milestones are planned. None of these are achieved results. Target numbers such as ripple or recovery thresholds are not published here to avoid confusion with measured data.
IP status
U.S. Utility Application No. 19/753,296
Filed July 24, 2026
Patent pending. This does not imply patent grant.
Methodology and update policy
How this registry is maintained
- Evidence classification is updated when validation advances.
- Measured and simulated values remain separate and are never merged or promoted between classes.
- Superseded results are retained where useful for chronology and clearly marked as superseded.
- Every exact performance value links back to a public article or public evidence description when available.
- Future hardware results are added as new entries rather than silently replacing simulation entries.
Proof history sequence
Reference Model → Embedded Execution → Single-Module Hardware → Observer Validation → Bounded Influence → Multi-Module Hardware
Request technical materials or discuss a validation case
Qualified partners and technical evaluators can request NDA-controlled materials including exact algorithm weights, thresholds, and validation records.